As development of computing and telecom technologies continues, high power density is increasingly required in switching power supply design. There is a trend toward increasing the switching frequency, and it will soon be in the megahertz range. Along with the benefits of higher operating switching frequency, such as compact size and faster loop response, there are also several drawbacks. An increase in gate drive loss is one drawback, since it is a frequency-related loss. The conventional gate driver circuit shown in FIG. 1 is widely used in current power converters, and includes a totem-pole pair of driving MOSFETs, Q1 and Q2, and an optional resistor between the driving MOSFETs and power MOSFET, M. Triggered by a PWM signal, the driving MOSFETs Q1 and Q2 are switched to provide the paths to charge and discharge the effective gate capacitance Cg of the power MOSFET. The total gate capacitive loss can be defined as:Pg=Cg·(VCC)2·fS  (1)Where Cg is effective gate capacitance of the power MOSFET, fS is the switching frequency, and VCC is the voltage of power source.
Equation (1) shows that the total charge stored in effective gate capacitance is proportional to the switching frequency and is completely dissipated by the gate driver. Thus, a higher switching frequency will result in increased power dissipation, which may cause the gate driver to be destroyed by overheating. Also, the gate loss takes a considerable share in total power dissipation, which reduces the efficiency of the converter significantly. In some cases, the gate loss is comparable with conduction loss [1]. Moreover, the conventional gate driver cannot meet the switching speed requirement of high frequency applications. Fast switching transition is crucial for performance of power converters, especially for low voltage, high current output converters. It can reduce switching loss and conduction loss as well. However, conventional gate driver operation is based on R-C charge and discharge characteristics. The turn-off transition increases as the voltage across the gate capacitance discharges and the discharging current falls below its peak value. Consequently, a longer turn-off transition occurs, which does not help to reduce switching loss and conduction loss. To increase the switching speed, transition paralleled gate drivers are employed in some cases. However, this results in increased component cost.
Many attempts have been made to recover gate loss energy [1]-[8]. However, such attempts are unsatisfactory or require gate control signals that are difficult to generate.